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authorThomas Voss <mail@thomasvoss.com> 2024-05-28 21:43:39 +0200
committerThomas Voss <mail@thomasvoss.com> 2024-05-28 21:43:39 +0200
commit28f152d2b8ab699f8174d47d84660309c90e2527 (patch)
tree7bd2248792d53287c189e14ba5f9f8757cab2e93 /src/c8asm
parentc80e2d9d22325514382ddf0e95abe6268bd413a7 (diff)
Format code
Diffstat (limited to 'src/c8asm')
-rw-r--r--src/c8asm/assembler.c8
-rw-r--r--src/c8asm/common.h2
-rw-r--r--src/c8asm/lexer.c2
-rw-r--r--src/c8asm/parser.c52
-rw-r--r--src/c8asm/parser.h2
5 files changed, 33 insertions, 33 deletions
diff --git a/src/c8asm/assembler.c b/src/c8asm/assembler.c
index 9aa356c..df555cc 100644
--- a/src/c8asm/assembler.c
+++ b/src/c8asm/assembler.c
@@ -68,10 +68,10 @@ pushlabel(struct labels *dst, struct label lbl)
void
assemble(FILE *stream, struct ast ast)
{
-#define PUT(X) \
- do { \
- uint16_t __x = htons(X); \
- fwrite(&__x, 1, sizeof(__x), stream); \
+#define PUT(X) \
+ do { \
+ uint16_t __x = htons(X); \
+ fwrite(&__x, 1, sizeof(__x), stream); \
} while (false)
bool pad = false;
diff --git a/src/c8asm/common.h b/src/c8asm/common.h
index aa32b2b..114657a 100644
--- a/src/c8asm/common.h
+++ b/src/c8asm/common.h
@@ -3,7 +3,7 @@
#include <rune.h>
-#define DIE_AT_POS_WITH_CODE(HL, P, ...) \
+#define DIE_AT_POS_WITH_CODE(HL, P, ...) \
die_at_pos_with_code(filename, filebuf, (HL), (P)-baseptr, __VA_ARGS__);
extern size_t filesize;
diff --git a/src/c8asm/lexer.c b/src/c8asm/lexer.c
index 12c96a4..282fd0e 100644
--- a/src/c8asm/lexer.c
+++ b/src/c8asm/lexer.c
@@ -65,7 +65,7 @@ lexfile(void)
return toks;
}
-#define DIE_AT_POS_WITH_CODE2(HL, ...) \
+#define DIE_AT_POS_WITH_CODE2(HL, ...) \
DIE_AT_POS_WITH_CODE((HL), sv->p - w, __VA_ARGS__)
void
diff --git a/src/c8asm/parser.c b/src/c8asm/parser.c
index 01e13ae..df6f3d0 100644
--- a/src/c8asm/parser.c
+++ b/src/c8asm/parser.c
@@ -218,33 +218,33 @@ reqnext(const char *want, tokkind msk)
#define I(...) ((struct dir){.kind = D_INSTR, .instr = (__VA_ARGS__)})
/* Common implementations of instructions that always take 1 or 2 v-registers */
-#define ONE_VREG(T) \
- do { \
- struct instr ins = {.kind = (T)}; \
- struct token tok = reqnext("v-register", T_IDENT); \
- if (regtype(tok.sv) & ~RT_VX) { \
- DIE_AT_POS_WITH_CODE(tok.sv, tok.sv.p, E_EXPECTED, "v-register", \
- tokrepr(tok.kind)); \
- } \
- ins.args[ins.len++].val = hexval(tok.sv.p[1]); \
- dapush(&ast, I(ins)); \
+#define ONE_VREG(T) \
+ do { \
+ struct instr ins = {.kind = (T)}; \
+ struct token tok = reqnext("v-register", T_IDENT); \
+ if (regtype(tok.sv) & ~RT_VX) { \
+ DIE_AT_POS_WITH_CODE(tok.sv, tok.sv.p, E_EXPECTED, "v-register", \
+ tokrepr(tok.kind)); \
+ } \
+ ins.args[ins.len++].val = hexval(tok.sv.p[1]); \
+ dapush(&ast, I(ins)); \
} while (false)
-#define TWO_VREG(T) \
- do { \
- struct instr ins = {.kind = (T)}; \
- struct token lhs = reqnext("v-register", T_IDENT); \
- struct token rhs = reqnext("v-register", T_IDENT); \
- if (regtype(lhs.sv) & ~RT_VX) { \
- DIE_AT_POS_WITH_CODE(lhs.sv, lhs.sv.p, E_EXPECTED, "v-register", \
- tokrepr(lhs.kind)); \
- } \
- if (regtype(rhs.sv) & ~RT_VX) { \
- DIE_AT_POS_WITH_CODE(rhs.sv, rhs.sv.p, E_EXPECTED, "v-register", \
- tokrepr(rhs.kind)); \
- } \
- ins.args[ins.len++].val = hexval(lhs.sv.p[1]); \
- ins.args[ins.len++].val = hexval(rhs.sv.p[1]); \
- dapush(&ast, I(ins)); \
+#define TWO_VREG(T) \
+ do { \
+ struct instr ins = {.kind = (T)}; \
+ struct token lhs = reqnext("v-register", T_IDENT); \
+ struct token rhs = reqnext("v-register", T_IDENT); \
+ if (regtype(lhs.sv) & ~RT_VX) { \
+ DIE_AT_POS_WITH_CODE(lhs.sv, lhs.sv.p, E_EXPECTED, "v-register", \
+ tokrepr(lhs.kind)); \
+ } \
+ if (regtype(rhs.sv) & ~RT_VX) { \
+ DIE_AT_POS_WITH_CODE(rhs.sv, rhs.sv.p, E_EXPECTED, "v-register", \
+ tokrepr(rhs.kind)); \
+ } \
+ ins.args[ins.len++].val = hexval(lhs.sv.p[1]); \
+ ins.args[ins.len++].val = hexval(rhs.sv.p[1]); \
+ dapush(&ast, I(ins)); \
} while (false)
void
diff --git a/src/c8asm/parser.h b/src/c8asm/parser.h
index a8cc03c..259d805 100644
--- a/src/c8asm/parser.h
+++ b/src/c8asm/parser.h
@@ -20,7 +20,7 @@ typedef enum {
I_DRW,
I_HEX,
I_JP_A,
- I_JP_V0_A,
+ I_JP_V0_ADDR,
I_LD_DT,
I_LD_I,
I_LD_ST,