1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
|
dnl IA-64 mpn_mod_34lsub1
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2003-2005, 2010 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C Itanium: ?
C Itanium 2: 1
C INPUT PARAMETERS
define(`up', `r32')
define(`n', `r33')
C Some useful aliases for registers we use
define(`u0',`r14') define(`u1',`r15') define(`u2',`r16')
define(`a0',`r17') define(`a1',`r18') define(`a2',`r19')
define(`c0',`r20') define(`c1',`r21') define(`c2',`r22')
C This is a fairly simple-minded implementation. One could approach 0.67 c/l
C with a more sophisticated implementation. If we're really crazy, we could
C super-unroll, storing carries just in predicate registers, then copy them to
C a general register, and population count them from there. That'd bring us
C close to 3 insn/limb, for nearly 0.5 c/l.
C Computing n/3 needs 16 cycles, which is a lot of startup overhead.
C We therefore use a plain while-style loop:
C add n = -3, n
C cmp.le p9, p0 = 3, n
C (p9) br.cond .Loop
C Alternatively, we could table n/3 for, say, n < 256, and predicate the
C 16-cycle code.
C The summing-up code at the end was written quickly, and could surely be
C vastly improved.
ASM_START()
PROLOGUE(mpn_mod_34lsub1)
.prologue
.save ar.lc, r2
.body
ifdef(`HAVE_ABI_32',`
addp4 up = 0, up C M I
nop.m 0
zxt4 n = n C I
;;
')
ifelse(0,1,`
movl r14 = 0xAAAAAAAAAAAAAAAB
;;
setf.sig f6 = r14
setf.sig f7 = r33
;;
xmpy.hu f6 = f6, f7
;;
getf.sig r8 = f6
;;
shr.u r8 = r8, 1 C Loop count
;;
mov.i ar.lc = r8
')
ld8 u0 = [up], 8
cmp.ne p9, p0 = 1, n
(p9) br L(gt1)
;;
shr.u r8 = u0, 48
dep.z r27 = u0, 0, 48
;;
add r8 = r8, r27
br.ret.sptk.many b0
L(gt1):
{.mmi; nop.m 0
mov a0 = 0
add n = -2, n
}{.mmi; mov c0 = 0
mov c1 = 0
mov c2 = 0
;;
}{.mmi; ld8 u1 = [up], 8
mov a1 = 0
cmp.ltu p6, p0 = r0, r0 C clear p6
}{.mmb; cmp.gt p9, p0 = 3, n
mov a2 = 0
(p9) br.cond.dptk L(end)
;;
}
ALIGN(32)
L(top):
{.mmi; ld8 u2 = [up], 8
(p6) add c0 = 1, c0
cmp.ltu p7, p0 = a0, u0
}{.mmb; sub a0 = a0, u0
add n = -3, n
nop.b 0
;;
}{.mmi; ld8 u0 = [up], 8
(p7) add c1 = 1, c1
cmp.ltu p8, p0 = a1, u1
}{.mmb; sub a1 = a1, u1
cmp.le p9, p0 = 3, n
nop.b 0
;;
}{.mmi; ld8 u1 = [up], 8
(p8) add c2 = 1, c2
cmp.ltu p6, p0 = a2, u2
}{.mmb; sub a2 = a2, u2
nop.m 0
dnl br.cloop.dptk L(top)
(p9) br.cond.dptk L(top)
;;
}
L(end):
cmp.eq p10, p0 = 0, n
cmp.eq p11, p0 = 1, n
(p10) br L(0)
L(2):
{.mmi; ld8 u2 = [up], 8
(p6) add c0 = 1, c0
cmp.ltu p7, p0 = a0, u0
}{.mmb; sub a0 = a0, u0
nop.m 0
(p11) br L(1)
;;
} ld8 u0 = [up], 8
(p7) add c1 = 1, c1
cmp.ltu p8, p0 = a1, u1
sub a1 = a1, u1
;;
(p8) add c2 = 1, c2
cmp.ltu p6, p0 = a2, u2
sub a2 = a2, u2
;;
(p6) add c0 = 1, c0
cmp.ltu p7, p0 = a0, u0
sub a0 = a0, u0
;;
(p7) add c1 = 1, c1
br L(com)
L(1):
(p7) add c1 = 1, c1
cmp.ltu p8, p0 = a1, u1
sub a1 = a1, u1
;;
(p8) add c2 = 1, c2
cmp.ltu p6, p0 = a2, u2
sub a2 = a2, u2
;;
(p6) add c0 = 1, c0
br L(com)
L(0):
(p6) add c0 = 1, c0
cmp.ltu p7, p0 = a0, u0
sub a0 = a0, u0
;;
(p7) add c1 = 1, c1
cmp.ltu p8, p0 = a1, u1
sub a1 = a1, u1
;;
(p8) add c2 = 1, c2
L(com):
C | a2 | a1 | a0 |
C | | | | |
shr.u r24 = a0, 48 C 16 bits
shr.u r25 = a1, 32 C 32 bits
shr.u r26 = a2, 16 C 48 bits
;;
shr.u r10 = c0, 48 C 16 bits, always zero
shr.u r11 = c1, 32 C 32 bits
shr.u r30 = c2, 16 C 48 bits
;;
dep.z r27 = a0, 0, 48 C 48 bits
dep.z r28 = a1, 16, 32 C 48 bits
dep.z r29 = a2, 32, 16 C 48 bits
dep.z r31 = c0, 0, 48 C 48 bits
dep.z r14 = c1, 16, 32 C 48 bits
dep.z r15 = c2, 32, 16 C 48 bits
;;
{.mmi; add r24 = r24, r25
add r26 = r26, r27
add r28 = r28, r29
}{.mmi; add r10 = r10, r11
add r30 = r30, r31
add r14 = r14, r15
;;
}
movl r8 = 0xffffffffffff0
add r24 = r24, r26
add r10 = r10, r30
;;
add r24 = r24, r28
add r10 = r10, r14
;;
sub r8 = r8, r24
;;
add r8 = r8, r10
br.ret.sptk.many b0
EPILOGUE()
ASM_END()
|