1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
|
dnl AMD64 mpn_addlsh_n and mpn_rsblsh_n. R = V2^k +- U.
dnl Copyright 2006, 2010-2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 2.87 < 3.85 for lshift + add_n
C AMD K10 2.75 < 3.85 for lshift + add_n
C Intel P4 22 > 7.33 for lshift + add_n
C Intel core2 4.1 > 3.27 for lshift + add_n
C Intel NHM 4.4 > 3.75 for lshift + add_n
C Intel SBR 3.17 < 3.46 for lshift + add_n
C Intel atom ? ? 8.75 for lshift + add_n
C VIA nano 4.7 < 6.25 for lshift + add_n
C TODO
C * Can we propagate carry into rdx instead of using a special carry register?
C That could save enough insns to get to 10 cycles/iteration.
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp_param', `%rdx')
define(`n_param', `%rcx')
define(`cnt', `%r8')
define(`vp', `%r12')
define(`n', `%rbp')
ifdef(`OPERATION_addlsh_n',`
define(ADDSUB, `add')
define(ADCSBB, `adc')
define(func, mpn_addlsh_n)
')
ifdef(`OPERATION_rsblsh_n',`
define(ADDSUB, `sub')
define(ADCSBB, `sbb')
define(func, mpn_rsblsh_n)
')
MULFUNC_PROLOGUE(mpn_addlsh_n mpn_rsblsh_n)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8d ')
push %r12
push %rbp
push %rbx
mov (vp_param), %rax C load first V limb early
mov $0, R32(n)
sub n_param, n
lea -16(up,n_param,8), up
lea -16(rp,n_param,8), rp
lea 16(vp_param,n_param,8), vp
mov n_param, %r9
mov %r8, %rcx
mov $1, R32(%r8)
shl R8(%rcx), %r8
mul %r8 C initial multiply
and $3, R32(%r9)
jz L(b0)
cmp $2, R32(%r9)
jc L(b1)
jz L(b2)
L(b3): mov %rax, %r11
ADDSUB 16(up,n,8), %r11
mov -8(vp,n,8), %rax
sbb R32(%rcx), R32(%rcx)
mov %rdx, %rbx
mul %r8
or %rax, %rbx
mov (vp,n,8), %rax
mov %rdx, %r9
mul %r8
or %rax, %r9
add $3, n
jnz L(lo3)
jmp L(cj3)
L(b2): mov %rax, %rbx
mov -8(vp,n,8), %rax
mov %rdx, %r9
mul %r8
or %rax, %r9
add $2, n
jz L(cj2)
mov %rdx, %r10
mov -16(vp,n,8), %rax
mul %r8
or %rax, %r10
xor R32(%rcx), R32(%rcx) C clear carry register
jmp L(lo2)
L(b1): mov %rax, %r9
mov %rdx, %r10
add $1, n
jnz L(gt1)
ADDSUB 8(up,n,8), %r9
jmp L(cj1)
L(gt1): mov -16(vp,n,8), %rax
mul %r8
or %rax, %r10
mov %rdx, %r11
mov -8(vp,n,8), %rax
mul %r8
or %rax, %r11
ADDSUB 8(up,n,8), %r9
ADCSBB 16(up,n,8), %r10
ADCSBB 24(up,n,8), %r11
mov (vp,n,8), %rax
sbb R32(%rcx), R32(%rcx)
jmp L(lo1)
L(b0): mov %rax, %r10
mov %rdx, %r11
mov -8(vp,n,8), %rax
mul %r8
or %rax, %r11
ADDSUB 16(up,n,8), %r10
ADCSBB 24(up,n,8), %r11
mov (vp,n,8), %rax
sbb R32(%rcx), R32(%rcx)
mov %rdx, %rbx
mul %r8
or %rax, %rbx
mov 8(vp,n,8), %rax
add $4, n
jz L(end)
ALIGN(8)
L(top): mov %rdx, %r9
mul %r8
or %rax, %r9
mov %r10, -16(rp,n,8)
L(lo3): mov %rdx, %r10
mov -16(vp,n,8), %rax
mul %r8
or %rax, %r10
mov %r11, -8(rp,n,8)
L(lo2): mov %rdx, %r11
mov -8(vp,n,8), %rax
mul %r8
or %rax, %r11
add R32(%rcx), R32(%rcx)
ADCSBB (up,n,8), %rbx
ADCSBB 8(up,n,8), %r9
ADCSBB 16(up,n,8), %r10
ADCSBB 24(up,n,8), %r11
mov (vp,n,8), %rax
sbb R32(%rcx), R32(%rcx)
mov %rbx, (rp,n,8)
L(lo1): mov %rdx, %rbx
mul %r8
or %rax, %rbx
mov %r9, 8(rp,n,8)
L(lo0): mov 8(vp,n,8), %rax
add $4, n
jnz L(top)
L(end): mov %rdx, %r9
mul %r8
or %rax, %r9
mov %r10, -16(rp,n,8)
L(cj3): mov %r11, -8(rp,n,8)
L(cj2): add R32(%rcx), R32(%rcx)
ADCSBB (up,n,8), %rbx
ADCSBB 8(up,n,8), %r9
mov %rbx, (rp,n,8)
L(cj1): mov %r9, 8(rp,n,8)
mov %rdx, %rax
ADCSBB $0, %rax
pop %rbx
pop %rbp
pop %r12
FUNC_EXIT()
ret
EPILOGUE()
|