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| author | Thomas Voss <thomas.voss@humanwave.nl> | 2024-08-26 11:06:04 +0200 |
|---|---|---|
| committer | Thomas Voss <thomas.voss@humanwave.nl> | 2024-08-26 11:06:04 +0200 |
| commit | 163a9d2422828460091f5b5d63e2c42b5040609c (patch) | |
| tree | c2ae54a1f133cfa8cdeae098b5a45eb1c70a9df5 /src/sha1-generic.c | |
| parent | 7f2660e2c061cac8bd375eab425a66445c7acda7 (diff) | |
Fix inline assembly for ARM64
Diffstat (limited to 'src/sha1-generic.c')
| -rw-r--r-- | src/sha1-generic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/sha1-generic.c b/src/sha1-generic.c index 600dcf5..b084f09 100644 --- a/src/sha1-generic.c +++ b/src/sha1-generic.c @@ -74,8 +74,8 @@ rotl32(uint32_t x, uint8_t bits) #if (__GNUC__ || __TINYC__) && __x86_64__ __asm__ ("roll %1, %0" : "+r" (x) : "c" (bits) : "cc"); return x; -#elif __GNUC__ && __aarch64__ /* TODO: Test this! */ - __asm__ ("ror %0, %0, %1" : "+r" (x) : "c" (-bits)); +#elif __GNUC__ && __aarch64__ + __asm__ ("ror %w0, %w0, %w1" : "+r" (x) : "r" (-bits)); return x; #else return (x << bits) | (x >> (32 - bits)); |